Wavelength Division Multiplexed Photonic Layer on .. (WADIMOS)
Wavelength Division Multiplexed Photonic Layer on CMOS
Start date: Jan 1, 2008,
End date: Jun 30, 2011
WADIMOS proposes to develop a generic technology for the realization of complex electro-photonic integrated ICs using standard CMOS processing technologies.These ICs will contain a photonic interconnect layer incorporating microsource arrays and ultracompact WDM (wavelength division multiplexing) functionality based on silicon nanophotonic wire circuits, driven directly from by the CMOS electronic circuitry. The photonic interconnect layer is intended to be incorporated in between the uppermost copper layers of an electronic IC. The availability of such ICs will benefit many applications in telecom, local access, datacom, automotives, avionics and sensing, on- and off-chip interconnect. Two applications will be investigated in particular: a 100TB/s datalink for a maskless-lithography tool based on a massively parallel e-beam tool and an optical network-on-chip based on a wavelength routed network directly integrated with CMOS circuits. The latter is addressing the expected limitations imposed by future purely electrical interconnects in complex MPSoC systems. These two applications are each backed by an industrial partner and their architectural design will be studied in separate workpackages, resulting in a set of specifications for the subcomponents forming the electro-photonic IC. Based on these inputs the different subcomponents will be designed, fabricated and characterized. The most relevant subcomponent is a III-V silicon heterogeneous multi-wavelength microsource array, which will be realized fully in a CMOS-pilot line, based on a process previously developed by project partners and independently by INTEL/USCB researchers. Finally, the different subcomponents will be integrated into two demonstrators each addressing one of both applications under study.
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