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Circuit Stability Under Process Variability and\n Electro-Thermal-Mechanical Coupling (SUPERTHEME)
Start date: Oct 1, 2012, End date: Sep 30, 2015 PROJECT  FINISHED 

Description Among the physical limitations which challenge progress in nanoelectronics for aggressively scaled More Moore, Beyond CMOS and advanced More-than-Moore applications, process variability and the interactions between and with electrical, thermal and mechanical effects are getting more and more critical. Effects from various sources of process variations, both systematic and stochastic, influence each other and lead to variations of the electrical, thermal and mechanical behaviour of devices, interconnects and circuits. Correlations are of key importance because they drastically affect the percentage of products which meet the specifications. Whereas the comprehensive experimental investigation of these effects is largely impossible, modelling and simulation (TCAD) offers the unique possibility to predefine process variations and trace their effects on subsequent process steps and on devices and circuits fabricated, just by changing the corresponding input data. This important requirement for and capability of simulation is among others highlighted in the International Technology Roadmap for Semiconductors ITRS. Within the SUPERTHEME project, the most important weaknesses which limit the use of current TCAD software to study the influence of both systematic and stochastic process variability and its interaction with electro-thermal-mechanical effects will be removed, and the study of correlations will be enabled. The project will efficiently combine the use of commercially available software and leading-edge background results of the consortium with the implementation of the key missing elements and links. It will bridge the current critical gap between variability simulation on process and device/interconnect level, and include the treatment of correlations. The capabilities of the software system will be demonstrated both on advanced analog circuits and on aggressively scaled transistors.

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