Analog SImulation and Variability Analysis for 14n.. (ASIVA14)
Analog SImulation and Variability Analysis for 14nm designs
Start date: Sep 1, 2013,
End date: Aug 31, 2017
"In recent years the demand of the electronics industry on mathematical methods used in EDA software has witnessed a tremendous growth. “The real world is analog and computers are digital.” These nine words set the stage for the great circuit design challenges of the next decade. To quote G. Dan Hutchenson, president of VLSI Research, “virtual reality is possible only with mixed-signal chips, and of course, every designer on the planet, from the creators of advanced smart phones to cars that nearly drive themselves, is hot on the trail of virtual reality.” Most current EDA methods and the tools that support them are inadequate to the task of designing for the “real world”, for to do so they must account for an enormous number of design considerations. The list is long and daunting for every application and includes process, voltage and temperature (PVT) variation, power consumption, process constraints and yield requirements. Advanced numerical techniques are imperative to address present-day challenges (going to 14 nm!) in the electronics industry.The motivation for this training network is the need for a network of highly educated European scientists in the field of mathematics for the EDA industry and computational science, so as to exchange and discuss current insights and ideas, and to lay groundwork for future collaborations. The challenge lies in the necessity of combining transferable techniques and skills such as mathematical analysis, sophisticated numerical methods and stochastic simulation methods with deep qualitative and quantitative understanding of mathematical models arising from problems in the electronics and EDA industry. The main training objective is to prepare, at the highest possible level, young researchers with a broad scope of scientific knowledge and to teach transferable skills. The two partners in the project combine decades of knowledge on EDA problems, and as such are an ideal basis for the hosting of the young ESRs to be trained."
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