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A full plasma and vacuum integrated process for the synthesis of high efficiency planar and 1D conformal perovskite solar cells (PlasmaPerovSol)
Start date: Jan 1, 2016, End date: Dec 31, 2017 PROJECT  FINISHED 

Photovoltaic or solar cells (SC) devices –that transform light into electricity- have been extensively studied in the last decades since they represent a promising way to exploit the sun energy. Currently, perovskite-based solar cells(SC) are receiving increasing attention due to their low cost and high efficiency. They are very promising as an alternative for the existing ones, but still need to advance to reach higher efficiency and durability and require synthesis methods compatible with the industrial production of CMOS devices at wafer scale. These recent SC are mostly fabricated via wet methods in planar architecture. Inherent to the nature of the wet approaches, usually appear several drawbacks as contaminations and chemical reactions on the interfaces that might result deterioration of the SC performance.PlasmaPerovSol main objective is the fabrication of a complete perovskite solar cell device by a full plasma and vacuum integrated process carried out under the premises of the “one reactor concept”. Thus, the different components of the solar cell will be deposited sequentially within a vacuum reactor avoiding exposition of the materials and interfaces to air or solvents. The technology developed by the hosting group combine vacuum deposition assisted by plasma that permits the fabrication of conformal layers over a large variety of templates. This approach is also proposed here to fabricate conformal multilayers over 1D scaffold that will demonstrate the advantages of 1D-SC. Plasma and vacuum processes present as advantage the high purity and stoichiometric control on the deposition within an ample range of materials compositions. The synthesis approach is compatible with large scale industrial production and allows the fabrication of SC on processable and flexible substrates. At the same time, the low temperatures used make the approach compatible with current CMOS technology and by using masks permits their integration on preformed devices.
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