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12 European Projects Found

Searched on 125080 European Projects

 FINISHED 
The target of this project is to prepare and train future engineers for the design challenges and opportunities provided by modern optics technology. Such challenges include lossless photon management, modelling at the system, components and feature level, and the link between design and technology. Today all optical designs are often perceived following different approaches, namely geometrical op ...
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 13

 FINISHED 

Technology Advances and Key Enablers for 5 nm (TAKE5)

Start date: Apr 1, 2016, End date: Mar 31, 2019,

The TAKE5 project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 10nm technology node and the ECSEL JU project SeNaTe aiming at the 7nm technology node. The main objective of the TAKE5 project is the demonstration of 5nm patterning in line with the industry needs and the ITRS roadmap in the Advanced Patter ...
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 13

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Seven Nanometer Technology (SeNaTe)

Start date: Apr 1, 2015, End date: Mar 31, 2018,

The SeNaTe project is the next in a chain of thematically connected ENIAC JU KET pilot line projects which are associated with 450mm/300mm development for the 12nm and 10nm technology nodes. The main objective is the demonstration of the 7nm IC technology integration in line with the industry needs and the ITRS roadmap on real devices in the Advanced Patterning Center at imec using innovative devi ...
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 41

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Pilot Line For Self Assembly Copolymer Delivery (PLACYD)

Start date: Jan 1, 2014, End date: Jan 1, 2017,

The PLACYD project aims at strengthening the European leadership in the field of advanced lithography. The consortiums gathers the main European Rnull actors along the whole value chain (Material suppliers, equipment suppliers, semiconductor companies, CAD companies, research laboratories) in order to bring the key materials, processes and design tools for Directed Self Assembly (DSA) Lithography ...
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 11

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5 major global semiconductor companies Intel, Samsung, TSMC, IBM and Global Foundries, have decided to work closely together to bring 450 mm semiconductor processing to a mature level, within a consortium called G450C. This operation, based in Albany N.Y., is currently ordering and installing the first wave of 450 mm systems. The major drivers of this effort are Intel and TSMC, which have provide ...
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 13

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European 450mm Equipment Demo Line (E450EDL)

Start date: Oct 1, 2013, End date: Sep 30, 2016,

The aim of the E450EDL project is to continue the engagement of the European semiconductor equipment and materials industry in the 450mm wafer size transition that started with the ENIAC JU EEMI450 initiative and proceeded with subsequent projects funded with public money, amongst others NGC450, SOI450, EEM450PR. The demo line resulting from this project will be such that it will enable first crit ...
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 44

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Description Among the physical limitations which challenge progress in nanoelectronics for aggressively scaled More Moore, Beyond CMOS and advanced More-than-Moore applications, process variability and the interactions between and with electrical, thermal and mechanical effects are getting more and more critical. Effects from various sources ...
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 9

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European E&M 450mm Pilotline Readiness (EEM450PR)

Start date: Apr 1, 2012, End date: Mar 1, 2015,

Aim of the EEM450PR project is to continue the engagement of the European semiconductor equipment and materials industry in the 450mm wafer size transition that started with the ENIAC JU EEMI450 initiative. It will also bring about the start of a vision to place an equipment development pilot line in the imec facility in Leuven. This will provide Europe with a complementary activity for 450mm equi ...
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European 450mm Equipment & Materials Initiative (EEMI 450)

Start date: Apr 1, 2010, End date: Mar 1, 2013,

Large-scale semiconductor fabrication is now standardised on 300mm diameter wafers. However, as demand grows and node dimensions diminish, major chipmakers are considering offsetting the growing costs of miniaturisation by increasing wafer size to 450mm to cut cost per produced die. A prerequisite is the availability of the required quality wafers and equipment able to handle larger wafers. The EN ...
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 27

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Surface Physics for Advanced Manufacturing (SPAM)

Start date: Oct 1, 2008, End date: Sep 30, 2012,

"Today, markets demand smaller, cheaper, energy friendly and more different consumer products. Last decades micro technology has opened possibilities for mobile communication, safety and health science products. To meet these demands, the industry is encountering technological barriers that prevent the industry from evolving from the micro to a nanotechnology era. To resolve these barriers, the i ...
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 12

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Lithography Enhancement towards Nano Scale (LENS)

Start date: Jan 1, 2009, End date: Dec 1, 2011,

Water immersion lithography has been widely accepted as patterning technology for the 45nm technology node, but solutions for the patterning of 32nm and 22nm technology nodes are not clear yet.EUV lithography is not yet available for industrial use, in spite of the impressive progresses registered till now, while multiple beam e beam lithography is still in development. Double patterning seems to ...
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 12

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Pan-European Reseach Infrastructure for Nano-Structures (PRINS)

Start date: Apr 1, 2008, End date: Mar 31, 2010,

The project focuses on all needed preparatory actions to enable in the following phase the construction of a Research Infrastructure (RI) called Pan-European Research Infrastructure for Nano-Structures (PRINS), with the aim of enabling European innovative research for the ultimate scaling of electronics component and circuits. The platform will be truly interdisciplinary by allowing the convergenc ...
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 10